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Analogix SerDes Chip Logs Error-Free 6.25-Gigabit Operation Over 56-Inch Traces in Test With Tyco Electronics "Legacy" Backplane Device Achieves 10-16 Bit Error Rate With Both Encoded and Unencoded Data SANTA CLARA, Calif., August 10, 2004 - Analogix Semiconductor has completed testing of its 6.25-gigabit-per-second SerDes (serializer-deserializer) chips using Tyco Electronics' HM-Zd Legacy Backplane System. The Analogix D-PHY 5G backplane transceiver maintained error-free signals at extended trace distances of up to 56 inches in a set of rigorous tests simulating real-world conditions. Analogix's D-PHY 5G, introduced in April, was tested operating at a full 6.25-Gbps rate with four full-duplex channels running simultaneously. The device achieved a BER (bit error rate) of 10-16 or better in tests with both encoded and unencoded data. Analogix and Tyco Electronics designed tests of unprecedented rigorousness to simulate the long-term, worst-case scenarios to which currently deployed high-volume, low-cost systems - as well as many newly-designed systems - are subject. The tests took into account key design variables in both backplanes and SerDes chips. On the backplane side, the Tyco Electronics HM-Zd Legacy Backplane Systems offered a reference platform with inexpensive FR-4 circuit-board material; low-cost, easy-to-use connectors; short and extended trace lengths on both the daughtercards and backplane; and the absence of additional performance-enhancing techniques, such as backdrilling. On the SerDes side, the Analogix D-PHY 5G family was tested with multiple data patterns, raw and encoded data, and multiple channels operating. Ted Rado, Analogix Vice President of Marketing, said, "The copper-based backplanes in today's systems weren't built to deal with noise levels that emerge at speeds of 5 Gbps and up. Yet designers are pressured to keep boosting performance within the limits of these original backplanes. So it is absolutely critical when testing new devices to put ourselves in the shoes of the system designer, and set up a test environment that mirrors his world. That world has a huge potential for noise generation, with long, narrow line-card and backplane traces, common legacy materials and the lack of costly 'luxury' processes such as backdrilling to reduce noise. Tyco Electronics' HM-Zd connectors and reference platform provide an excellent way to show how a vendor's SerDes solution can perform under realistic system-level testing conditions." John D'Ambrosia, manager of semiconductor relations at Tyco Electronics, said, "The HM-Zd Legacy backplane was designed to test emerging 6.25-Gbps devices in an environment that is representative of backplanes in the field today. The use of higher-performance materials, selective layer routing, or backdrilling optimize the performance of the test backplane channel and minimize the challenges that a device will face during testing such as this, as opposed to operating conditions in the real world. Analogix used our HM-Zd Legacy platform to subject its new products to extremely stringent testing. The D-PHY devices were put through their paces at the highest possible bit rate under full-duplex conditions using both encoded and unencoded data. Truly impressive results, in terms of the distances over which the devices maintained truly error-free signal integrity, were achieved." Test Details In the first test, using PRBS 31 (pseudorandom bit sequence) unencoded data, the D-PHY 4x5G drove signals 42 inches over both 1) two 10-inch line-card traces, a 16-inch backplane trace, two Tyco HM-Zd connectors and a six-inch Analogix evaluation board; and 2) two 2.5-inch line card traces, a 30-inch backplane trace, two connectors and a six-inch evaluation board. In the second test, using CJPAT (continuous jitter test pattern) encoded data, the D-PHY 4x5G device drove signals 56 inches over two 10-inch line card traces, a 30-inch backplane trace, two connectors and a six-inch evaluation board. All tests ran error-free for more than seven days, correlating to bit error rates of 10-16 or better. Tyco Electronics' HM-Zd Legacy Backplane System, introduced in July 2003, provides a common, defined environment for interoperability and performance testing of solutions for designs using low-voltage differential signaling. Based on Nelco 4000-6 material, it provides eight full-duplex paths and implements differential pairs based on a .006-inch trace width. Analogix's D-PHY family of backplane transceivers uses advanced analog signal conditioning techniques to eliminate the signal-integrity problems ("noise") that characterize high-speed data transmission over copper media. D-PHY products drive increased performance through existing backplane traces while interoperating with existing line cards. The D-PHY family is designed for use in enterprise switches and routers, carrier-class transport equipment, Fibre Channel and IP-based storage systems, and high-end servers. About Analogix Semiconductor Analogix is based in Santa Clara, Calif., with development offices in Beijing, China. The privately-held company, which has 40 employees, has raised $10 million from Woodside Fund, Doll Capital Management and IDG Technology Venture Investment. For more information, visit http://www.analogix.com. About Tyco Electronics ###
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© 2005, Analogix Semiconductor, Inc. All rights reserved. |
